Retrochallenge 2010/10 (Supplement)
DEC PDP-1 Instruction List

INSTRUCTION FORMAT

The PDP-1 (Digital Equipment Corporation Programmed Data Processor – 1) uses the following instruction format:

                      1 1 1 1 1 1 1 1
  0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7    bits
┌──────┴───┬─┼─────┴─────┴─────┴─────┐
│  opcode  │i│   address / operand   │   instruction format
└──────────┴─┴───────────────────────┘

The standard memory of 4k 18-bit words is in the address space from 00000 to 77777 (octal). Additional memory is addressible either by an extended address mode or by bank switching. There are 6 program flags and 6 sense switches. The console test word is a normal 18-bit register. The PDP-1 uses 1's complement to represent negative numbers. There are two user addressible register, the accumulator (AC) and the I/O register (IO), which might be combined to a single 36 bit register for shifts and rotates. Further, there is an overflow flag (set in instructions add and sub), a program counter (PC), and an internal memory buffer (MB). Addresses and values are usually referred to in octal format (since memory words, addresses, and any parameters are multiples of 3 and a nibble of 3 bits is forming a single octal digit).

Any instructions involving a memory look up may be modified by setting the i-bit (defer bit). If the defer bit is set, the contents of the address part of the provided address will be used for another address look up and the address part of this memory register will be used for the instruction (recursively). A deferred look up adds 5 μsec to the operation time used by the instruction. With instructions of the skip group a set i-bit inverts the condition of the skip. With the I/O-group of instructions the presence of the i-bit will instruct the PDP-1 to wait for a completion pulse to be returned by the divice. The micro-programmed instructions of the skip and operate groups may be combined into a union to be performed in a single memory cycle (5 μsec).

In the table below Y refers to the address part of an instruction.
The contents of a register are indicated by C(x). Thus C(Y) means the contents of memory at address Y; C(AC) means the contents of the accumulator; C(IO) means the contents of the In-Out register.

BASIC INSTRUCTIONS

*) div and mul replace dis and mus when the automatic multiply/divide type 10 option is installed.
**) Any skips occurring while performing a xct instruction will be executed in place.

OPERATE GROUP

Note: Execution of the following spare operation codes causes the computer to halt: 00, 12, 14, 36, and 74.

Instructions of the operate group may be combined by an inclusive OR to form a union that will be performed in a single memory cycle (5 μsec).

SKIP GROUP

Instructions of the skip group may be combined by an inclusive OR to form a union that will be performed in a single memory cycle (5 μsec).

SHIFT/ROTATE GROUP

Shift and rotate instructions are peformed for the number of bits set to high in the lower half of the instruction (bits 9–17). See the Macro constants "1s" – "9s" below.

IN-OUT TRANSFER GROUP

Note: As opposed to the official list the Macro assembler has the instructions rpa, rpb, ppb, tyo, and dpy defined with the i-bit included. E.g., dpy is defined as 730007, use dpy-i for a plain dpy instruction.

I/O WAIT

PERFORATED TAPE READER

PERFORATED TAPE PUNCH

ALPHANUMERICAL ON-LINE TYPEWRITER

SEQUENCE BREAK SYSTEM TYPE 120

HIGH SPEED DATA CONTROL TYPE 131

PRECISION CRT DISPLAY TYPE 30

SYMBOL GENERATOR TYPE 33

ULTRA-PRECISION CRT DISPLAY TYPE 31

CARD PUNCH CONTROL TYPE 40-1

CARD READER TYPE 421

PROGRAMMED MAGNETIC TAPE CONTROL TYPE 51

AUTOMATIC MAGNETIC TAPE CONTROL TYPE 52

AUTOMATIC MAGNETIC TAPE CONTROL TYPE 510

MULTIPLEXED A-D CONVERTER TYPE 138/139

AUTOMATIC LINE PRINTER TYPE 64

DRUM TYPE 23

DATA COMMUNICATION SYSTEM TYPE 630 (PDP-1D)

OTHER / NON-STANDARD

INSTRUCTIONS SPECIFIC TO THE PDP-1D

RNG-MODE RELATED AND I/O INSTRUCTIONS (PDP-1D)

MACRO ASSEMBLER CONSTANTS

*****

Editorial Note: This list is based on the "Abbreviated Instruction List" in: PDP-1 Handbook (F-15D), DEC, Maynard 1963, Oct 1963 revision and has been updated with additional information regarding instructions specific to the PDP-1D based on information provided in PDP-1 Supplement (PDP-1D-45), DEC, Maynard 1964 and the mus and dis instructions of early PDP-1s.

*****

◀ RC 2016/10 — Index.