Instructions

• Select your preferred color scheme by clicking the options "Dark" and "Light" at the top right.
• Paste, drag-and-drop, or upload (using the file dialog button) the object code into the code field. This memory be a series of hex values or a binary file.
  With the option ”strip leading addresses” on, any leading 4-hex-digit code addresses will be automatically discarded.
• Enter a start address (hexadecimal) and press "Load Memory".
• At the processor display, set the program counter by either clicking the location display or its title.
• Below the processor display, you see the next instruction to be executed and a preview of its effects with operands resolved.
• Click the buttons "Single Step" or "Continuous Run".
• Optionally click the checbox "trace" for a detailed log of operations.
• Press "Show Memory" to display a page of memory starting at the currently specified start address.
  Click the option "live update" to observe any changes to the memory in real-time.

The object code may be a series of byte values in hex format (in pairs of two or separated by white space and/or commas). Any heading line numbers or addresses preceded or followed by a colon (":") are ignored, as are any comments (starting with a semicolon or a backslash). Using the file upload button or drag-and-drop, files may be text files containg a similar hex dump or binary files.

Observe the tool-tips of any options for further information or read the description below.

Description

Processor Display

This display shows all (yes its all there is) registers of a 6502/6510 CPU:

PC

Program Counter

AC

Accumulator

XR

X Register

YR

Y Register

SR

Status Register

SP

Stack Pointer

The status register (SR) holds the following flags (from bit 7 to 0):

N

Negative

V

Overflow

–

unused

B

Break (not a real CPU flag)

D

Decimal

I

Interrupt (IRQ disable)

Z

Zero

C

Carry

The line disassembler shows the current value of the program counter (PC), the content of the according memory address (the next instruction followed by the operands, if any), and a disassembly of the respective instruction.

The cycle time display shows the clock ticks of exceeded CPU time (including extra cycles for branches and page transitions).

Setting the Registers

• Click a registers label to set its value.
• Click on a SR flag to flip its value.

Traps & Breakpoints

You may set any number of traps or breakpoints, which will be monitored in continuous run mode. Traps may observe the value of any of the 3 main registers (AC, XR, YR), watch for an under- or overflow of the stack register (SR), or monitor for the program counter (PC) by setting a breakpoints. These observers may by activated/deactivated both individually and globally. Interrupts (on execution of a BRK instruction, code 00) will always trigger a trap.

Memory Architecture

The emulator implements 64K of memory for the full 16-bit address range.
The 6502's stack of 1K range is located at 0100 to 01FF (hard wired).

Accessing the Memory

To load some code to execute:

• Enter (and edit) any amount of hex code in the memory inspector's pane,
  or drag & drop a binary file or hex-dump file onto the memory pane,
  or use the file upload button located immediately below the memory pane.
• Specify the start address (in hex) and press the button "Load Memory".

Inspecting Memory

• The memory widget lets you also inspect the memory, in steps of 256 (0x100) bytes (a page of memory) at once. You may alter the display's content and load it back into the emulator's memory. (Any figures prefixed or suffixed by a colon (":") are ignored as line numbers.)
• The option "live update" causes the memory display to update with each step of the emulator.
• The option "ignore ROM" bypasses any loaded ROMs and shows RAM content only.
• Alternatively, the button "Look Up Mem #" (found among the emulator controls at the top) provides a dialog for a quick inspection of a 16-byte range around any memory address.

Clearing & Presetting the Memory

Use the button "clear meory" to reset the memory. You may specify a byte value to be used as a fill byte (e.g., "EA", NOP, as used by the C64) in the confirmation prompt.

Loading ROMs

For those who can't help nostalgia, there are a few ROM sets ready to load. ROMs will be loaded in a write-protected area of their own. However, you can still write to the underlaying "shadow" RAM.

Note: the KIM-1 (© CBM) consits only of the main ROM and doesen't comprise the cassette extension.

The option "emulate pre-June 1976 series ROR bug" may be useful for use with the KIM-1 and the SYM-1 ROMs. (With this infamous bug of the early 6502 production series, Revision A, the ROR instruction behaves like ASL, but shifts in zero and preserves the carry flag. Officially, the instruction was not yet implemented. See here for details. Indeed, in those early revisions, there isn’t any logic at all to copy the carry bit in order to shift it in as the highest significant bit, and ROR is rather to be considered an “illegal” opcode.)

(Mind that you can temporarily disable/enable ROM by calling "cpu6502.enableROM(<boolean: on/off>)" from the browser's JavaScript console.)

Illegal Opcodes

Undocumented instructions, AKA "illegal opcodes", are supported and will be listed with an asterisk prefix by the following mnemonics (common synonyms in parentheses):

*ALR   (ASR)
*ANC
*ANC   (ANC2)
*ANE   (XAA)
*ARR
*DCP   (DCM)
*ISC   (ISB, INS)
*LAS   (LAR)
*LAX
*LXA   (LAX immediate)
*RLA
*RRA
*SAX   (AXS, AAX)
*SBX   (AXS, SAX)
*SHA   (AHX, AXA)
*SHX   (A11, SXA, XAS)
*SHY   (A11, SYA, SAY)
*SLO   (ASO)
*SRE   (LSE)
*TAS   (XAS, SHS)
*SBC   (USBC)
*NOP   (DOP, TOP)
*JAM   (KIL, HLT)

A reset will be required, once the CPU encounters a "JAM" instruction.
(Following common recommendations, the emulator uses the "magic constants" $EF and $EE to implement the instructions "ANE" and "LXA", respectively.)

About the Emulator

This application emulates a 65xx-family micro processor unit that was the heart of so popular micro computers as the Apple II (6502) or the Commedore 64 (6510). The most common types, the 6502 and 6510 processors, are basicly the same and share the same instruction tables. (The 6510 varies from 6502 only in the implementation of 6 I/O ports at addresses 0000 and 0001.)
The emulator implements all legal and "illegal" (i.e. undocumented) instructions of the 6502 MPU and mimics the various quirks and bugs closely.
For detailed information on the 6502/6510 see the 6502 instruction set.

The emulator's core had once been loosely based on the 6510 emulation C source by Earle F. Philhower III for his "Commodore 64 Emulator v0.3" for Mac, © 1993/4, but has been rewritten, since. JavaScript port and GUI by © Norbert Landsteiner 2005. Major rewrite, support for undocumented instructions, and updated GUI © Norbert Landsteiner 2021.

The 6502 CPU script and the underlying C source are free software and may be redistributed and/or modified under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or any later version.

Accuracy / Compatibility

Generally, the emulator simulates a NMOS 6502 MPU. It passes Klaus Dormann’s functional test suite for the 6502 and the extensive decimal mode (BCD) test for ADC and SBC instructions by Bruce Clark.
(There’s also a hidden 65C02 mode, but this only adjusts decimal behavior and timing without supporting any of the 65C02-specific instructions or disabeling “illegal” 6502 instructions sharing the same instruction codes. As this is merely a partial emulation, this mode is not recommended for actual use.)

Disclaimer

This application is provided for free and AS IS, therefore without any warranty; without even the implied warranty of merchantability or fitness for a particular purpose. Use at own risk.

This application uses either Web Storage technology or, if this is not available, a cookie to store your choice for the preferred color mode for the virtual 6502 suite of applications. (Either the word "light" or the word "dark" is stored.)

Related Links

• 6502.org — the 6502 microprocessor resource
• visual6502.org — visual transistor-level simulation of the 6502 CPU
• www.65xx.com — official 65xx Website (The Western Design Center Inc.)

© Norbert Landsteiner 2005–2024, mass:werk